A comprehensive guide to the profit pool and industry landscape of AI storage layers.

AI storage is divided into six layers, from near to far: on-chip SRAM, HBM, motherboard DRAM, CXL pooling, enterprise SSD, and NAS/cloud object storage. In 2025, the total market is ~$229 billion, with DRAM at ~50%, HBM 15%, and SSD 11%. Each layer is highly concentrated, with the top three players typically holding >90% share.

Key takeaways:

HBM (High Bandwidth Memory): The largest profit pool in the AI era, dominated by SK Hynix, Samsung, and Micron. SK Hynix achieved a 72% operating margin in Q1 2026, surpassing TSMC and NVIDIA. The market is projected to reach $100B by 2028 (CAGR 28%). High margins stem from TSV complexity, CoWoS packaging yields, and supply-demand tightness.
Enterprise SSD: The biggest beneficiary of the inference era. QLC SSDs offload KV cache, RAG indices, etc. The 2025 market is $26.1B (CAGR 24%), with Samsung, SK Hynix (incl. Solidigm), and Micron holding ~90% combined.
CXL Pooling: An emerging high-margin layer enabling rack-level memory pooling. Astera Labs leads in retimers with ~55% sub-share and 76%+ gross margin; the CXL module market is expected to grow at 37% CAGR to $23.7B by 2033.
Motherboard DRAM: The largest volume layer ($121.8B in 2025). While margins (30-40%) are lower than HBM, capacity shifted to HBM sustains pricing power.
On-chip SRAM: Profit accrues to TSMC, as advanced process wafers embed ever-larger SRAM areas for AI chips.
NAS & Cloud Object Storage: The long-tail storage, driven by data gravity, hosting lock-in. AWS, Azure, Google Cloud control ~65-70% of cloud storage.

The layering arises because on-chip cache is too small for large models, necessitating external memory; data movement introduces latency and energy costs. Future directions: stacking HBM closer, CXL pooling, and compute-in-memory integration. Each layer’s profit pool differs in nature, growth, and moat—proximity to compute yields higher margins.

Author: Godot

AI storage can be broken down into six layers.

1) On-chip SRAM

2) HBM

3) Motherboard DRAM

4) CXL pooling layer

5) Enterprise-grade SSDs

6) NAS and Cloud Object Storage

This hierarchy is based on the location of the storage; the further down the hierarchy you go, the farther away it is from the computing unit, and the larger the storage capacity.

In 2025, the total market size of these six layers (SRAM is on computing chips, so its embedded value needs to be excluded) will be approximately US$229 billion, of which DRAM will account for half, HBM for 15%, and SSD for 11%.

In terms of profit, each level is extremely oligopolistic, with the top three generally holding a market share of over 90%.

These profit pools can be divided into three categories.

1) High-margin oligopolistic pools at the silicon wafer level (HBM, embedded SRAM, QLC SSD)

2) High-margin emerging pools (CXL) in the interconnect layer

3) Scalable compound interest pools at the service layer (NAS, cloud object storage)

The three types of pools differ in nature, growth rate, and competitive advantage.

Why is storage tiered?

Because the CPU, which is responsible for control, and the GPU, which is responsible for calculation, only have temporary cache, namely on-chip SRAM cache. This cache space is too small; it can only hold some temporary parameters and cannot hold large models.

In addition to these two chips, a larger amount of external memory is needed to store the large model and the inference context.

It's relatively fast, but the biggest problem is the latency and energy consumption when moving data between different storage tiers.

Therefore, there are currently three directions.

1) Stack HBM, place memory next to the GPU to shorten the transportation distance.

2) CXL pools memory at the rack level, sharing capacity.

3) Computation and storage are soldered onto the same wafer, enabling in-memory computing.

These three directions will determine the shape of each layer of the profit pool over the next five years.

The following are the specific layers.

L0 On-Chip SRAM: A Profit Pool Exclusively for TSMC

SRAM (Static Random-access Memory) is an internal cache of the CPU/GPU, embedded in each chip and not traded individually.

The standalone SRAM chip market is only $1 billion to $1.7 billion, with Infineon (about 15%), Renesas (about 13%), and ISSI (about 10%) being the leading players. The market is small.

This portion of the profit pool is held by TSMC. Each generation of AI chips requires the purchase of more wafers in order to accommodate more SRAM.

TSMC controls over 70% of the world's advanced process wafers. Every SRAM area, whether H100, B200, or TPU v5, ultimately becomes TSMC's revenue.

L1 HBM: The Largest Profit Pool in the AI Era

HBM (High Bandwidth Memory) is a high-bandwidth memory that vertically stacks DRAM (Dynamic Random-access Memory) using Through Silicon Vias (TSV) technology and then attaches it next to the GPU using CoWoS packaging.

HBM almost single-handedly determines the size of models that AI accelerators can run. SK Hynix, Micron, and Samsung have nearly 100% market share.

As of the first quarter of 2026, the latest market share structure is as follows: SK Hynix 57% to 62%, Samsung 22%, and Micron 21%. SK Hynix has secured a large share of procurement from companies such as NVIDIA and is currently the dominant supplier.

Micron mentioned in its Q1 FY2026 earnings call that HBM TAM (Total Potential Market) will grow at a CAGR of approximately 40%, from approximately $35 billion in 2025 to $100 billion in 2028, reaching $100 billion two years earlier than previously predicted.

HBM's core advantage lies in its extremely high profit margins. In the first quarter of 2026, SK Hynix's operating profit margin reached a record 72%.

The reason for the high profits

1) The TSV manufacturing process will sacrifice some traditional DRAM production capacity, keeping HBM in short supply;

2) It is difficult to improve the yield of advanced packaging, which is why Samsung's market share dropped from 40% to 22%.

3) Major suppliers have been cautious in expanding production capacity, and achieved a quarter-on-quarter increase of over 60% in the average selling price (ASP) of DRAM in the first quarter of 2026, demonstrating a clear seller's market position.

Among the three giants, SK Hynix, driven by HBM's strong performance, achieved an operating profit of 47.21 trillion won in 2025, surpassing Samsung Electronics for the first time in history. In the first quarter of 2026, with an operating profit margin of 72%, it even surpassed the profitability of TSMC (58.1%) and NVIDIA (65%).

Micron has extremely high growth prospects, and Bank of America (BofA) significantly raised its price target to $950 in May 2026. Samsung, with the continued progress of HBM4 mass production, has the greatest potential for market share recovery.

L2 motherboard DRAM

This level is what we usually call memory modules.

Motherboard DRAM includes conventional memory products such as DDR5, LPDDR, GDDR, and MR-DIMM. Currently, it accounts for the largest share of market sales in the AI storage system. In 2025, the global DRAM market size reached approximately US$121.83 billion.

Samsung, SK Hynix, and Micron still dominate the market. According to the latest data from the fourth quarter of 2025, Samsung ranked first with a market share of 36.6%, SK Hynix ranked second with 32.9%, and Micron ranked third with 22.9%.

Currently, production capacity has shifted to the more profitable HBM, allowing memory to maintain high profits and pricing power. Although the profit margin of a single product, conventional motherboard DRAM, is not as high as that of HBM, its overall market size is the largest.

L3 CXL Pooling Layer

CXL (Compute Express Link) allows DRAM to be "pooled" from a single server motherboard across the entire rack.

From CXL 3.x onwards, all memory in a single rack can be shared and scheduled by multiple GPUs, allocated on demand. This solves the problem of insufficient space and difficulty in moving key-value caches, vector databases, and RAG indexes during AI inference.

CXL memory modules are projected to be worth only $1.6 billion in 2024, but $23.7 billion in 2033. It seems the market will remain an oligopoly dominated by Samsung, SK Hynix, and Micron.

In this layer, Astera Labs manufactures retimers and smart memory controllers between CXL and PCIe, holding approximately 55% of the market share in this sub-market. Their latest quarterly revenue was $308 million, a 93% year-over-year increase, with a non-GAAP gross margin of 76.4% and net profit up 85% year-over-year. That's incredibly profitable.

L4 Enterprise SSD: The Biggest Beneficiary of the Inference Era

Enterprise-grade NVMe SSDs are the primary battleground for AI training checkpointing, RAG indexing, KV cache offload, and model weight caching. High-capacity QLC SSDs have completely squeezed HDDs out of AI data lakes.

The enterprise SSD market is projected to reach $26.1 billion in 2025, with a CAGR of 24%, and is expected to reach $76 billion in 2030.

As for the overall situation, yes, it's still dominated by the three giants.

Based on Q4 2025 revenue, market share is as follows: Samsung 36.9%, SK Hynix (including Solidigm) 32.9%, Micron 14.0%, Kioxia 11.7%, and SanDisk 4.4%. The top five together account for approximately 90%.

The biggest change at this level is the explosive growth of QLC SSDs in AI inference scenarios. Hynix subsidiaries Solidigm and Kioxia have already produced products with a single-disk capacity of 122 TB, and the KV cache and RAG index for AI inference are overflowing from HBM to SSDs.

From a profit perspective, enterprise-grade SSDs do not have the extreme gross margin of HBM, but they enjoy the dual benefits of capacity-driven growth and inference expansion.

Hynix and Kioxia are relatively pure targets. Samsung and SK Hynix, on the other hand, enjoy the benefits of HBM + DRAM + NAND, making them more comprehensive AI storage platform companies.

L5 NAS and Cloud Object Storage: A Compound Interest Pool of Data Gravity

NAS and cloud object storage form the outermost layer for AI data lakes, training corpora, backup archiving, and cross-team collaboration. By 2025, NAS is projected to reach approximately $39.6 billion (CAGR of 17%), while cloud object storage is projected to reach approximately $9.1 billion (CAGR of 16%).

The main vendors for enterprise-grade file storage are NetApp, Dell, HPE, and Huawei; for small and medium-sized enterprises, Synology and QNAP are the leading players. Based on IaaS market share, cloud object storage has AWS at approximately 31–32%, Azure at approximately 23–24%, and Google Cloud at approximately 11–12%, totaling about 65–70%.

The profits at this level mainly come from long-term hosting, data going online, and ecosystem locking.

To summarize,

1) DRAM has the largest market share but the lowest gross profit margin (30-40%); HBM has only one-third the market share of DRAM, but its gross profit margin is more than double (60%+); CXL retimer has the smallest market share but the highest gross profit margin (76%+). The closer to the computing power layer, the scarcer and more profitable it is.

2) The increase in profit pool mainly comes from three sources: HBM (CAGR 28%), enterprise-grade SSD (CAGR 24%), and CXL pooling (CAGR 37%).

3) Each layer has different business barriers. HBM relies on technological barriers, such as TSV, CoWoS, and yield ramp-up; CXL relies on IP and certification, and a single supply chain for heavy timers; and service-oriented businesses rely on switching costs.